A data processing apparatus includes a data processing section that issues a plurality of data transfer requests simultaneously; an internal memory provided inside a circuit including the data processing section; an internal memory control section that performs an access control for the internal memory; an external memory that exchanges data with the data processing section via an external bus; an external memory control section that performs an access control for the external memory; and a memory selecting section that assigns to at least one of the internal memory and the external memory a data transfer request from the data processing section.