An internal clock generator that modulates a high-frequency clock signal
to a low-frequency signal to transmit the low-frequency signal if a
transmission line for transmitting the high-frequency clock signal is
long, and then restores the transmitted low-frequency signal to the
high-frequency signal. The internal clock generator includes a first
signal generation unit for receiving a first signal having a first
frequency and generating a second signal having a second frequency that
is lower than the first frequency, and a second signal generation unit
for receiving the second signal and generating a third signal having a
frequency equal to the first frequency. Here, the third signal is used as
a signal for controlling an operating time point of an internal circuit
of a synchronous memory device.