A method of converting designs from a field programmable gate array (FPGA) to a mask programmable gate array (MPGA), comprising: an FPGA comprising a programmable logic block array, and a plurality of programmable interconnect wires, and a bit-stream of memory data to program the FPGA; and an MPGA comprising identical layouts of the programmable logic block array and the plurality of programmable interconnect wires, wherein the bit-stream data is converted to a custom metal pattern to mask program the MPGA.