An A/D converter comprises a ramp voltage generation circuit, a voltage
comparison circuit comprising an arithmetic unit comparing an analog
voltage to be converted with a reference voltage showing the voltage
change of a ramp voltage, and changing an output when the reference
voltage equals the analog voltage, a counter counting and outputting a
digital value corresponding to the reference voltage, a latch circuit
latching and outputting the digital value when the output of the voltage
comparison circuit changes, an averaging process circuit to obtain an
average noise voltage, a target noise voltage setting circuit setting a
target noise voltage, and a control circuit adjusting at least one of a
counting start timing of the counter with respect to a control reference
timing, or the criterion level of the reference voltage at the counting
start timing, based on a difference between the average noise voltage and
the target noise voltage.