An apparatus and method for decoding low density parity check (LDPC) codes are provided. A memory module configured by a plurality of unit memories stores a reliability value. Variable node processors perform a computation associated with a variable node, and update data of the memory module in a column direction, respectively. Check node processors perform a computation associated with a check node, and update data of the memory module in a row direction, respectively. A parity checker determines if all errors have been corrected such that an iterative decoding process is performed. A memory access control module selects a unit memory to be updated by a variable node processor or a check node processor.