A method and apparatus for testing an integrated circuit interconnect comprises an IC having circuitry embedded in the IC capable of providing a pseudo time domain reflectometry test by launching a test transition onto the interconnect and capturing a reflection of the test transition.

 
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> On-board FIFO memory module for high speed digital sourcing and capture to/from DUT (device under test) using a clock from DUT

> Non-relay initialization for modems

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