A variable size first in first out (FIFO) memory is disclosed. The
variable size FIFO memory may include head and tail FIFO memories
operating at a very high data rate and an off chip buffer memory. The off
chip buffer memory may be, for example, of a dynamic RAM type. The off
chip buffer memory may temporarily store data packets when both head and
tail FIFO memories are full. Data blocks of each of the memories may be
the same size for efficient transfer of data. After a sudden data burst
which causes memory overflow ceases, the head and tail FIFO memories
return to their initial functions with the head FIFO memory directly
receiving high speed data and transmitting it to various switching
element and the tail FIFO memory storing temporary overflows of data from
the head FIFO memory.