A first memory level includes a first plurality of memory cells that includes every memory cell in the first memory level. Each memory cell includes a vertically oriented p-i-n diode in the form of a pillar that includes a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The first plurality of memory cells includes programmed cells and unprogrammed cells, wherein programmed cells comprise at least half of the first plurality of memory cells. Current flowing through the p-i-n diodes of at least 99 percent of the programmed cells when a voltage between about 1.5 volts and about 3.0 volts is applied between the bottom heavily doped p-type region and the top heavily doped n-type region is at least 1.5 microamps.