A test system is disclosed wherein a device under test (DUT) includes a
trace logic analyzer (TLA) that receives and stores test data. The test
system includes both a master tester and a slave tester. The slave tester
operates at a high speed data rate substantially faster than that of the
master tester. The master tester instructs the TLA to monitor data that
the DUT receives from the slave tester to detect a predetermined data
pattern within the data. The slave tester transmits data including the
predetermined data pattern to the DUT. The DUT receives the data. When
the TLA in the DUT detects the predetermined data pattern in the received
data, the TLA stores that data pattern as a stored data pattern. The
master tester retrieves the stored data pattern and compares the stored
data pattern with the original predetermined data pattern. If the master
tester determines that the stored data pattern is the same as the
original predetermined data pattern, then the master tester generates a
pass result. Otherwise, the master tester generates a fail result. In one
embodiment, the DUT includes multiple receivers and the system determines
a pass/fail rating on a per receiver basis.