In an A/D converter provided with an A/D converter circuit 101 for
operationally amplifying an input signal and outputting an amplified
signal, the A/D converter circuit 101 includes an initial value setting
circuit 4a in addition to an amplifier 1a, a sub-A/D converter 2a, a
sub-D/A converter 3a and capacitors C11 and C12. To ensure that the
initial value of the output voltage of the amplifier 1a is a given
voltage value close to the target value of operational amplification at
the start of the operational amplification by the amplifier 1a, the
initial value setting circuit 4a applies a given bias value equal to the
given voltage value close to the target value to a next-stage capacitor
C13 to be connected to the output side of the amplifier 1a. Such an A/D
converter circuit 101 that can perform speedy convergence to the target
value of operational amplification is used at each stage of a pipeline
A/D converter.