A topology for a three-phase, wye-connected H-bridge converter allowing continued operation when one H-bridge phase has failed by bypassing the failed H-bridge, increasing dc-bus voltage to provide the required output load voltage, and decreasing switching frequency to reduce power losses in semiconductor switches. In normal operation, the dc-bus voltage is operated at a lower voltage, improving the reliability of power semiconductor devices. When an H-bridge is bypassed, the dc-bus is operated at a higher voltage but lower effective switching frequency, reducing semiconductor losses, allowing the converter to put out more current with the same temperature rise in the power switches.