A plasma display panel (PDP) according to one embodiment includes: a first substrate and a second substrate that are disposed substantially in parallel with each other with a predetermined distance therebetween; a plurality of address electrodes disposed on the first substrate; a first dielectric layer disposed on an entire surface of the first substrate while covering the address electrodes; a plurality of barrier ribs having a predetermined height from the first dielectric layer and disposed in a space between the first substrate and the second substrate to partition the space into discharge spaces of a predetermined size; a phosphor layer disposed in the discharge spaces; a plurality of display electrodes disposed on one side of the second substrate facing the first substrate in a direction crossing the address electrodes; a second dielectric layer disposed on an entire surface of the second substrate to cover the display electrodes; and a protective layer disposed to cover the second dielectric layer. The protective layer includes MgO having a crystalline grain size ranging from 100 to 500 nm and has a membrane density of less than or equal to 3.3 g/cm.sup.3.