A computer implemented method, data processing system, and processor are provided for thermal throttle control with minimal impact to interrupt latency. A setting of an interrupt status bit is monitored. A determination is made as to whether an interrupt associated with the interrupt status bit is an unmasked interrupt in response to the interrupt status bit being set. An existing throttling mode is disabled and the interrupt handled in response to the interrupt being unmasked, where the interrupt latency of the integrated circuit is reduced.

 
Web www.patentalert.com

< Digital rights management handler and related methods

> Graphics system with reduced shadowed state memory requirements

> Method and apparatus for conducting data transactions between multiple programs

~ 00589