A ramp voltage generation circuit suitable for an A/D converter preventing a variation in a digital value obtained by an A/D conversion operation. The circuit comprises a stabilization voltage source Vref, an operation amplifier AMP1 having a non-inversion input terminal receiving a voltage V.sub.REF from the Vref and an inversion input terminal connected to a switched capacitor equivalent resistance Req, and a transistor MNSF for conducting a current Ick to the Req based on an output voltage of the AMP1. Both ends of a conductive load Cint charged and discharged based on a current Iint2 generated by a current mirror of the Ick are connected to an output terminal and an inversion input terminal of an operation amplifier AMPint, a voltage of a stabilization voltage source Vc is applied to a non-inversion input terminal, and an output voltage of the AMPint is outputted to the outside as a ramp voltage.