Methods are provided for fabricating memory devices. A method comprises
fabricating charge-trapping stacks overlying a silicon substrate and
forming bit line regions in the substrate between the charge trapping
stacks. Insulating elements are formed overlying the bit line regions
between the stacks. The charge-trapping stacks are etched to form two
complementary charge storage nodes and to expose portions of the silicon
substrate. Silicon is grown on the exposed silicon substrate by selective
epitaxial growth and is oxidized. A control gate layer is formed
overlying the complementary charge storage nodes and the oxidized
epitaxially-grown silicon.