Various embodiments of the present invention are generally directed to a method and apparatus for carrying out a partial block update operation upon a resistive sense memory (RSM) array, such as formed from STRAM or RRAM cells. The RSM array is arranged into multi-cell blocks (sectors), each block having a physical block address (PBA). A first set of user data is written to a selected block at a first PBA. A partial block update operation is performed by writing a second set of user data to a second block at a second PBA, the second set of user data updating a portion of the first set of user data in the first PBA. The first and second blocks are thereafter read to retrieve the second set of user data and a remaining portion of the first set of user data.

 
Web www.patentalert.com

< PROTECTIVE COATINGS FOR DATA STORAGE DEVICES

< Nand Based Resistive Sense Memory Cell Architecture

> VOLTAGE REFERENCE GENERATION FOR RESISTIVE SENSE MEMORY CELLS

> Non-Volatile Memory Cell with Multiple Resistive Sense Elements Sharing a Common Switching Device

~ 00606