An MRAM that is not subject to accidental writing of half-selected memory elements is described, together with a method for its manufacture. The key features of this MRAM are a C-shaped memory element used in conjunction with a segmented bit line architecture.

 
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< Electromechanical memory, electric circuit using the same, and method of driving electromechanical memory

< Read reference technique with current degradation protection

> Data-flow based post pass optimization in dynamic compilers

> Nonvolatile semiconductor memory device and data erase/write method thereof

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