Described is a technology by which a memory controller is a component of a
hybrid memory device having different types of memory therein (e.g.,
SDRAM and flash memory), in which the controller operates such that the
memory device has only a single memory interface with respect to voltage
and access protocols defined for one type of memory. For example, the
controller allows a memory device with a standard SDRAM interface to
provide access to both SDRAM and non-volatile memory with the
non-volatile memory overlaid in one or more designated blocks of the
volatile memory address space (or vice-versa). A command protocol maps
memory pages to the volatile memory interface address space, for example,
permitting a single pin compatible multi-chip package to replace an
existing volatile memory device in any computing device that wants to
provide non-volatile storage, while only requiring software changes to
the device to access the flash.