A non volatile memory assembly that includes a reference element having: a reference component; and a reference transistor, wherein the reference component is electrically connected to the reference transistor, and the reference transistor controls the passage of current across the reference component; and at least one non volatile memory element having: a non volatile memory cell, having at least a low and a high resistance state; and an output that electrically connects the reference element with the at least one non volatile memory element, wherein the reference transistor and the memory transistor are activated by a reference gate voltage and a memory gate voltage respectively, and the reference gate voltage and the memory gate voltage are not the same.