An integrated circuit including: non-volatile memory for containing secret information; and a detection unit for preventing at least one form of power supply attack on the secret information, the detection unit comprising: a first comparator having a first input connected to a first reference voltage and a second input connected to a power supply line, the first comparator being configured to output a first detection signal when a power supply voltage moves beyond a first predetermined limit determined by the first reference voltage; and an output to provide a signal to delete, overwrite, or otherwise render unreadable at least the secret information in the memory when the first detection signal is output by the first comparator.