The present invention is directed to reduce offset error voltage in a signal source impedance of analog input signal voltage supplied to an input terminal due to input offset voltage of an operational amplifier in a sampling circuit or a multiplexer coupled to an input terminal of an A/D converter. A semiconductor integrated circuit has an A/D converter and a sampling circuit. The sampling circuit samples an analog input signal in first and second sample modes. The A/D converter converts the sampled analog signal to a digital signal in a conversion mode. By switching of an internal circuit of an operational amplifier between the first and second sample modes, the functions of a non-inverting input terminal (+) and an inverting input terminal (-) realized by first and second input terminals are switched. Synchronously with the switching, supply of an analog signal to the non-inverting input terminal by input switches is also switched.

 
Web www.patentalert.com

< Measurement of the current of a frequency converter

< Circuit and method for driving a junction field effect transistor

> Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise

> Switching circuitry

~ 00620