A media coprocessor for performing 3-D graphics, video, and audio functions. The media coprocessor is comprised of a single IC semiconductor chip which is coupled with a host processor chip, one or more memory chips, and an I/O controller chip. The media coprocessor includes a digital bitstream processor, a digital signal processor, and a display processor. An update interval, synchronized to a video frame, is defined. This update interval is divided into a number of partitions. Audio data is processed during one of the partitions. Video data is processed during another partition. And 3-D graphics is processed in another partition. Thereby, the processing is performed in a sequential, time-division multiplex scheme whereby the single media coprocessor chip processes all three partitions in a single video frame.