An integrated circuit includes at least one porous silicon oxycarbide (SiOC) insulator, which provides good mechanical strength and a low dielectric constant (e.g., .epsilon..sub.R <2) for minimizing parasitic capacitance. The insulator provides IC isolation, such as between circuit elements, between interconnection lines, between circuit elements and interconnection lines, or as a passivation layer overlying both circuit elements and interconnection lines. The low dielectric constant silicon oxycarbide isolation insulator of the present invention reduces the parasitic capacitance between circuit nodes. As a result, the silicon oxycarbide isolation insulator advantageously provides reduced noise and signal crosstalk between circuit nodes, reduced power consumption, faster circuit operation, and minimizes the risk of potential timing faults.

 
Web www.patentalert.com

< (none)

< Optical sensor using an immunological reaction and a fluorescent marker

> High strength cast aluminum-beryllium alloys containing magnesium

> (none)

~ 00019