In deep submicron technologies, coupling capacitance significantly
dominates the total parasitic capacitance. This causes crosstalk noise to
be induced on quiescent signals which could lead to catastrophic failures.
A methodology is provided that is a practical approach to full-chip
crosstalk noise verification. A multi-dimensional noise lookup table is
formed for a cell used within the IC, wherein the multi-dimensional noise
table relates a set of input noise pulse characteristics and a set of
output loading characteristics to an output noise pulse characteristic of
the cell. A noise pulse on an input to an instantiation of a cell is
determined and then characterized. An output loading characteristic of the
cell is also made. A prediction of whether the instantiation of cell will
propagate the noise pulse is made by selecting an output noise pulse
characteristic from the multi-dimensional noise table corresponding to the
noise pulse characteristic and to the output loading characteristic. Other
instantiations of the cell are evaluated using the same multi-dimensional
noise table. A prediction of whether each instantiation of cell will
propagate the noise pulse is made by selecting an output noise pulse
characteristic from the multi-dimensional noise table corresponding to the
noise pulse characteristic and to the output loading characteristic
associated with each instantiation of the cell.