Packaging substrate for electronic elements and electronic device having packaged structure

   
   

A packaging substrate for electronic elements comprises a first area for receiving an electronic element through flip chip bonding and a second area for receiving an electronic element through wire bonding. The first area has a bonding pad having applied on a surface thereof a coating of a solder material. The packaging substrate is used in the production of an electronic device having mounted thereon electronic elements such as semiconductor chips.

 
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< Electronic circuit unit that is suitable for miniaturization and suitable for simple output adjustment

< Heat sink material

> Semiconductor device and package including forming pyramid mount protruding through silicon substrate

> Wiring-inclusive structure and forming method thereof

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