A semiconductor memory cell having a data storage element constructed
around an ultra-thin dielectric, such as a gate oxide, is used to store
information by stressing the ultra-thin dielectric into breakdown (soft or
hard breakdown) to set the leakage current level of the memory cell. The
memory cell is read by sensing the current drawn by the cell. A suitable
ultra-thin dielectric is high quality gate oxide of about 50 .ANG.
thickness or less, as commonly available from presently available advanced
CMOS logic processes.
