An interconnection substrate comprises an uppermost interconnection layer
having a plurality of terminal pads located at positions corresponding to
a plurality of solder bumps (external connection terminals) provided on a
semiconductor element which is to be mounted on the interconnection
substrate. The interconnection substrate also has a metal column formed on
each of the terminal pads and has a resin film covering a side surface of
the metal column. The interconnection substrate further has an insulating
layer formed on the uppermost interconnection layer so that a gap is
formed between the insulating layer and an outer peripheral surface of the
resin film.
