Various apparatuses and methods in which an integrated circuit includes a
non-volatile memory cell and a keep mode circuit. The non-volatile memory
cell has a charge storage component. The keep mode circuit has a storage
device and a keep mode switch. The storage device receives information
stored in the non-volatile memory cell. The keep mode switch connects the
storage device to the non-volatile memory cell in order to apply a static
bias voltage across the charge storage component to restrict charge-loss
to a predetermined level.
