An electrically erasable and programmable memory includes a memory array
having memory cells connected to word lines and bit lines. The bit lines
are arranged in columns. The memory also includes read circuits connected
to the bit lines and programming latches connecting the bit lines to a
programming line. The memory includes a device to break the conductive
paths connecting the memory cells of a column to the read circuits when
data has been loaded into the latches of the column, without breaking the
conductive paths that connect the latches of the column to the read
circuits.