To provide a communication apparatus that can relieve the processing load when
packet transfer is made with hardware. A packet transfer apparatus includes an
input buffer for storing temporarily an input packet, an address acquiring section
for acquiring the information needed for the transfer, a retrieval circuit for
retrieving the information regarding the output with the acquired destination address
as a key, a label insertion circuit for encapsulating a packet with the labels
in the maximum number of stack layers M designated for a packet group having a
unit of destination address, and a switch section for switching the encapsulated
packet to a desired output destination port.
