A memory module preferably includes a printed circuit board (PCB) panel having
multiple memory chip pad groups arranged on both sides thereof. Each memory chip
pad group preferably includes multiple pads that correspond to lead lines of multiple
memory chips arranged on the PCB panel. Connectors are preferably formed along
an edge of the PCB panel to electrically connect the memory chip pad groups to
an external device. Multiple damping chip pad groups preferably include built-in
damping chips. One or more of the damping chip pad groups are preferably arranged
adjacent to a lateral edge of one or more of the memory chips. The damping chip
pad groups can electrically connect the connectors to the memory chip pad groups
and dampen the signal noises.
