A circuit and method of interleaving a data stream (DATA) in which the data to
be interleaved is contained in separate sections of the data stream. A buffer storage
circuit (28) receives and stores the data stream. A first section (T1-T2)
of the data stream is transferred to a first memory circuit (62) and a second
section (T3-T5) of the data stream is transferred to a second memory
circuit (64). A multiplexer circuit (68) receives data from the first
and second memory circuits and selects between the first and second sections of
the data stream in response to a selection signal to produce an interleaved output signal.
