A fully programmable, graphics microprocessor is disclosed which is designed
to
be embodied in a removable external memory unit for connection with a host information
processing system. In an exemplary embodiment, a video game system is described
including a host video game system and a pluggable video game cartridge housing
the graphics microprocessor. The game cartridge also includes a read-only program
memory (ROM) and a random-access memory (RAM). The graphics coprocessor operates
in conjunction with a three bus architecture embodied on the game cartridge. The
graphics processor using this bus architecture may execute programs from either
the program ROM, external RAM or its own internal cache RAM. The fully user programmable
graphics coprocessor has an instruction set which is designed to efficiently implement
arithmetic operations associated with 3-D graphics and, for example, includes special
instructions executed by dedicated hardware for plotting individual pixels in the
host video game system's character mapped display which, from the programmer's
point of view, creates a "virtual" bit map by permitting the addressing of individual
pixelseven though the host system is character based. The graphics coprocessor
interacts with the host coprocessor such that the graphics coprocessor's 16 general
registers are accessible to the host processor at all times.
