An access transistor (140) for a vertical DRAM device (110) and
method of forming thereof. Trenches (114) are formed in a semiconductor
wafer substrate (112), and storage capacitors (118) are formed in
the bottom portion of the trenches (114). The trenches (114) are
curved in a channel (130) region formed in a top portion of the trenches
(114). The channel (130) is curved about a central point c, and the
channel extends into the substrate (112) by a distance d along a radius
b. A gate oxide (126) is disposed adjacent the curved channel (130),
and a gate conductor (128) is disposed adjacent the gate oxide (126).
