A gate electrode of each MISFET is formed on a substrate in an active region
whose
periphery is defined by an element isolation trench, and crosses the active region
so as to extend from one end thereof to the other end thereof. The gate electrode
has a gate length in a boundary region defined between the active region and the
element isolation trench which is greater than a gate length in a central portion
of the active region. The gate electrode is configured in an H-type flat pattern.
Further, the gate electrode covers the whole of one side extending along a gate-length
direction, of the boundary region defined between the active region L and the element
isolation trench, and parts of two sides thereof extending along a gate-width direction.
The MISFETs are formed in electrically separated wells and are connected in series
to constitute part of a reference voltage generating circuit.
