Integrated structure effective to form a MOS component in a dielectrically insulated well

   
   

The integrated structure and process is effective to form, in a dielectrically insulated well, a MOS component including respective drain and source regions of a first conductivity type as well as a gate region. The integrated structure includes a cut-off layer of the second conductivity type effective to surround only the source region. The cut-off layer is self-aligned by the gate region.

 
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