A semiconductor device (100) according to the present invention comprises
a vertical PNP bipolar transistor (20), an NMOS transistor (50) and
a PMOS transistor (60) that are of high dielectric strength, and a P-type
semiconductor substrate 1, as shown in FIG. 2. A substrate isolation
layer (21) of the PNP bipolar transistor (20), a drain buried layer
(51) of the NMOS transistor (50), and a back gate buried layer (61)
of the PMOS transistor (60) are formed simultaneously by selectively implanting
N-type impurities, such as phosphorous, in the semiconductor substrate (1).
This invention greatly contributes to curtailing the processes of fabricating BiCMOS
ICs and the like including vertical bipolar transistors with easily controllable
performance characteristics, such as a current amplification factor, and MOS transistors
with high dielectric strength and makes even more miniaturization of such ICs achievable.
