Semiconductor memory having channel regions at sides of a trench

Semiconductor memory and method for fabricating the same, the semiconductor memory including a cell transistor having a trench region formed in a semiconductor substrate and channel regions at sides of the trench region, source/drain regions formed in a bottom of the trench region and in a surface of the substrate adjacent to the trench region and in contact with the channel region, and gate electrodes at sides of the trench insulated from the trench wall.