Method and apparatus for automatically eliminating inferred latches created
by hardware design language (HDL) source code is described. A node tree is built
from the HDL source code based on the HDL's Language Reference Manual. The node
tree is scanned to identify one or more conditional logic constructs that are sources
for creation of inferred latches. A modified node tree is generated by automatically
adding and/or modifying sub-productions of the conditional language constructs
that create the inferred latches.
