Peripheral circuits of electrically programmable three-dimensional memory
   
   

The present invention makes improvements to the peripheral circuits of the electrically programmable three-dimensional memory (EP-3DM). Full-read mode and self-timing are used to improve the speed and lower the power consumption Cached EP-3DM is disclosed to reduce the latency. Redundancy can be employed to improve the yield of the EP-3DM.

 
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