A method for fabricating a thin film array substrate for a liquid crystal display
includes steps of forming a gate line assembly and a common electrode line assembly
on a first substrate. The gate line assembly includes a plurality of gate lines
and gate pads, and the common electrode line assembly includes common signal lines
and common electrodes. Thereafter, a gate insulating layer is formed on the first
substrate, and a semiconductor pattern and an ohmic contact pattern are formed
on the gate insulating layer. A data line assembly and pixel electrodes are then
formed on the first substrate. The data line assembly includes a plurality of data
lines, data pads, and source and drain electrodes. The pixel electrodes are connected
to the drain electrodes while proceeding parallel to the common electrodes. A passivation
layer is formed on the substrate. The passivation layer and the gate insulating
layer are etched such that the gate pads and the data pads are exposed to the outside.
At this time, the etching is performed after an assembly process where a second
substrate is arranged to face the first substrate and assembled together and the
passivation layer and the gate insulating layer are exposed outside of the second substrate.
