A method of reducing parasitic capacitance in an integrated circuit having three
or more metal levels is described. The method comprises forming a bond pad at least
partially exposed at the top surface of the integrated circuit, forming a metal
pad on the metal level below the bond pad and forming an underlying metal pad on
each of the one or more lower metal levels. In the illustrated embodiments, the
ratio of an area of at least one of the underlying metal pads to the area of the
bond pad is less than 30%. Parasitic capacitance is thus greatly reduced and signal
propagation speeds improved.
