A switch circuit selectively provides a reference voltage, needed in some I/O
standards,
to a logic device. The circuit receives a dedicated power supply that is different
from the device's I/O supply. It may also include a level shifting circuit for
converting a master control signal having a logic level determined by a first supply
to a first control signal having a logic level determined by the dedicated supply.
The switch circuit also includes a transmission switch that passes the reference
voltage to an output in response to at least the first control signal. The transmission
switch may be a CMOS transmission gate with at least one NMOS transistor controlled
by the first control signal in parallel with at least one PMOS transistor controlled
by a second control signal, complementary to the first. The second control signal
may be generated by another level shifting circuit and have a logic level determined
by the I/O supply.