Method and apparatus for mapping software prefetch instructions to hardware prefetch logic

   
   

A method and apparatus for mapping some software prefetch instructions in a microprocessor system to a modified set of hardware prefetch instructions and executing the software prefetch by invoking the corresponding modified hardware prefetch instruction. For common software prefetch access patterns, by mapping the software prefetches to hardware, improved prefetching can be achieved without the need for additional hardware.

 
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< High-performance, superscalar-based computer system with out-of-order instruction execution

< Co-processor including a media access controller

> Apparatus, method, and system for synchronizing information prefetch between processors and memory controllers

> System and method for adaptively adjusting clock skew in a variably loaded memory bus

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