A highly intelligent DSP load management system is described herein for enhancing
the processing capabilities of an SOC device. The DSP load management system enables
parallel processing of data at high frequency and distributes, reads and writes
data to several CPUs and/or DSPs in the same clock cycle. In addition, the DSP
load management system provides forward looking real-time evaluation of arriving
data and diverts tasks from one DSP to another, with short or zero latency. The
DSP load management system is interfaced between one or more CPUs, one or more
DSPs and/or a memory management system for enabling parallel processing of data
at high frequency.
