A first diffused layer and a second diffused layer are formed on the major surface
of a silicon substrate. A first insulating layer, a second insulating layer or
a semiconductor layer, and a third insulating layer are laminated on the major
surface of the silicon substrate in the vicinity of the first diffused layer or
the second diffused layer and are partially formed. A fourth insulating layer is
formed as a gate insulating film. A fifth insulating layer is formed on the side
walls of the second insulating layer or the semiconductor layer. In a region of
most of a channel, the gate insulating film is formed and a gate electrode is formed
so that it covers the gate insulating film and the laminated films. According to
this structure, the operating voltage of a flash memory is reduced, the operation
is easily sped up and the holding characteristic of information charge can be enhanced.
