An apparatus for reducing leakage currents in an integrated circuit having logic
gates containing PMOS devices and NMOS devices. The apparatus comprises a power
management unit capable of: i) applying a fixed VDD supply voltage to body connections
of said PMOS devices; ii) applying a fixed VSS supply voltage to body connections
of said NMOS devices; iii) applying an adjustable PMOS source voltage to sources
of said PMOS devices; and iv) applying an adjustable NMOS source voltage to sources
of said NMOS devices.
