A tester comprises test logic and a connector for at least one device under test.
The connector, which may comprise a wafer probe for dice on a wafer or a test fixture
or either packaged integrated circuit devices or circuit board modules, has connections
for the device under test that present an impedance selected to emulate the characteristic
impedance of an end-use environment of the device under test. For example, in an
embodiment in which the device under test comprises DDR memory and the end-use
environment is a DDR memory module, the characteristic impedance is approximately
60 ohms. Because this accurate simulation is available even for dice on a wafer,
the needless expense associated with packaging defective dies and assembling defective
dies into modules can be avoided.
