The present invention relates to a ferroelectric memory having a matrix-type memory cell array which has a superior degree of integration, in which the angularity of the ferroelectric layer's hysteresis curve is improved, the production yield is increased and costs are reduced. A ferroelectric memory having improved angularity in the hysteresis curve, and superior memory characteristics, production yield and costs is realized as follows. Namely, a peripheral circuit chip and a memory cell array chip are engaged onto an inexpensive assembly base 300 such as glass or plastic. In memory cell array chip 200, a ferroelectric layer is made to undergo epitaxial growth on to a Si single crystal via a buffer layer and first signal electrode. As a result, a ferroelectric memory can be realized which has improved angularity in the hysteresis curve and superior memory characteristics, production yield, and cost.