An address generator is provided for generating addresses for testing an addressable
circuit. The address generator can include a base address register for buffer-storing
a base address. The base address register can be assigned an associated offset
register group having a plurality of offset registers for buffer-storing relative
address values. Further, the address generator can include a first multiplexer
circuit which is dependent on a base register selection control signal, switches
through an address buffer-stored in the base address register to a first input
of an addition circuit and to an address bus, which is connected to the circuit
to be tested. A second multiplexer circuit can be dependent on the base register
selection control signal, through-connects the offset register group associated
with the through-connected base address register to a third multiplexer circuit,
which is dependent on an offset register selection control signal.